Nanostructure-Based Vacuum Channel Transistor

NASA Ames has patented a unique gate insulated vacuum channel transistor. The vacuum transistor is created using standard silicon semiconductor processing. This is done by etching a tiny cavity in phosphorous doped silicon, bordered by three electrodes; a source, a gate, and a drain. The source and drain are separated by 150 nanometer (nm), with the gate on top. Electrons are emitted from the source due to a voltage applied across it and the drain, while the gate controls the electron flow across the cavity. When the gap between the source and drain is of the order of 150nm the electrons do not collide. The mean free path of the electrons (the average length an electron can travel before hitting something) is more than 1micrometer (m). Advantages of the vacuum tube and transistor are combined here through nanofabrication. A photoresist ashing technique enables a nanogap separation of the emitter and the collector, thus allowing operation at less than 10V. This allows high frequency and power output while satisfying the metrics of lightness, cost, lifetime, and stability at harsh conditions. The operation voltage can be decreased comparable to modern semiconductor devices.