Nanostructure-Based Vacuum Channel Transistor
electrical and electronics
Nanostructure-Based Vacuum Channel Transistor (TOP2-174)
Gate insulated vacuum channel transistor
NASA Ames has patented a unique gate insulated vacuum channel transistor. The vacuum transistor is created using standard silicon semiconductor processing. This is done by etching a tiny cavity in phosphorous doped silicon, bordered by three electrodes; a source, a gate, and a drain. The source and drain are separated by 150 nanometer (nm), with the gate on top. Electrons are emitted from the source due to a voltage applied across it and the drain, while the gate controls the electron flow across the cavity. When the gap between the source and drain is of the order of 150nm the electrons do not collide. The mean free path of the electrons (the average length an electron can travel before hitting something) is more than 1micrometer (m). Advantages of the vacuum tube and transistor are combined here through nanofabrication. A photoresist ashing technique enables a nanogap separation of the emitter and the collector, thus allowing operation at less than 10V. This allows high frequency and power output while satisfying the metrics of lightness, cost, lifetime, and stability at harsh conditions. The operation voltage can be decreased comparable to modern semiconductor devices.
A planar lateral air transistor was fabricated using standard silicon semiconductor processing. The emitter and collector were sub-lithographically separated by photoresist ashing, with the curvature of the tip controlled by the thermal reflow of the photoresist. The gap can be shrunk as small as 10nm using this process. Since the nanogap separating the emitter and collector is smaller than the electron mean free path in air, vacuum is not needed. The present structure exhibits superior gate controllability and negligible gate leakage current due to adoption of the gate insulator. The device has potential for high performance and low power applications; also, since vacuum as the carrier transport medium is immune to high temperature and radiation, the proposed nanotransistors are ideal for extreme environments. Process and layout refinements such as coating a low work function material on the emitter, reducing the overlap area and optimizing the oxide thickness can potentially improve the cut-off frequency well into the THz regime.
- High performance with low power application
- Ideal for extreme environments
- Superior gate controllability and negligible gate leakage current
- Robustness in the presence of very high temperature and/or radiation
- Reduced turn-on voltage
- Ballistic carrier transport
- Biosensor technology
- Biomedical technology