PCI Assembly Design
information technology and software
PCI Assembly Design (LAR-TOPS-149)
Reconfigurable peripheral component interconnect (PCI) local bus controller and target design
Overview
The invention is a design for a peripheral component interconnect (PCI) local bus controller and target in a PC/104-Plus form-factor. The design uses a flashbased field programmable gate array (FPGA) to provide immediate functionality from power-on to avoid delay after power is applied. It can be reprogrammed from connectors directly on the board, and is able to both receive and drive the clock for system and local peripherals, allowing it to function as either a PCI bus host controller or PCI target device interface. Fully compliant with the PC/104- Plus specification, the design has associated schematics and Gerber files in a vendor-ready state. The design was developed to support ongoing research in fault-tolerant computing systems.
The Technology
The PCI assembly design features flash based Field Programmable Gate Array (FPGA) technology providing in-system reprogrammable functionality from power-on. The system hosts flash-based FPGAs, SRAMs, I/O interfaces, and clocking circuitry. The circuit accommodates in-system-programming via on-board connectors, and allows functionality with separate hardware implementations with controller functionality or add-on-card functionality.
Benefits
- Simplifies design and implementation
- Reprogrammable functionality is available from the power-on state
- A single hardware assembly supports multiple functions within a computer system
Applications
- Fault-tolerant computing systems
- High-speed data acquisition
- Video acquisition
- Surveillance
- Communication gateway routers
- Embedded servers
- Intelligent transportation systems
