Double Sided Si(Ge)/Sapphire/III-Nitride Hybrid Structures

Several of the patented methods included in this suite of technologies enable super-hetero-epitaxy of rhombohedral/cubic compound semiconductors on specially oriented trigonal (e.g. sapphire) or hexagonal (e.g. quartz) crystal wafer substrates. This includes alignment of the growth crystal lattice with the underlying substrate lattice to minimize misfit strain-induced dislocation defects in the growing crystal. Thus thicker, defect-free crystal layers can be made. Rhombohedral/Cubic crystal twin defects which is 60 degree rotated on [111] orientation in a rhombohedral/cubic SiGe layer structure can be reduced to well less than 1% by volume, essentially providing a defect-free semiconductor material. Alternately, engineered lattice structures with a high degree of twinning can provide SiGe with improved thermoelectric properties due to the phonon scattering that inhibits thermal conduction without compromising electrical conductivity. Additional patented technologies in this suite provide for physical vapor deposition (PVD) growth methods utilizing molten sputtering targets and thermal control of heated substrates, including electron beam heating, in order to give the atoms in the sputtered vapor or on the substrate surface the energy needed for the desired crystal growth. The remaining patented technologies enable x-ray diffraction methods for detecting and mapping crystal twin defects across the entire as-grown semiconductor layer. These defects are critical to the performance of any semiconductor device manufactured from such compound semiconductor materials.

This innovation is based on a new fabrication method that alleviates the thermal loading requirement of the substrate, which previously required surface temperatures within the range of 850 to 900C. Our method employs a new thermal loading requirement of sapphire substrate for growing single crystal SiGe on sapphire substrate, in the range of 450 to 500C. SiGe/sapphire wafers produced via this process show a high reflectivity without the discoloration that appears in low quality films.

Performance of solar cells and other electronic devices such as transistors can be improved greatly if carrier mobility is increased. Si and Ge have Type-II bandgap alignment in cubically strained and relaxed layers. Quantum well and super lattice with Si, Ge, and SiGe have been good noble structures to build high electron mobility layer and high hole mobility layers. However, the atomic lattice constant of Ge is bigger than that of Si and direct epitaxial growth generates large density of misfit dislocations which decrease carrier mobility and shorten device life time. So it required special buffer layers such as super lattice or gradient indexed layers to grow Ge on Si wafers or Si on Ge wafers. The growth of these buffer layers takes extra effort and time such as post-annealing process to remove dislocations by dislocation gliding inside buffer layer. This invention is a fabrication method for high mobility layer structures of rhombohedrally aligned SiGe on a trigonal substrate. The invention utilizes C-plane (0001) Sapphire which has a triangle plane, and a Si (Ge) (C) (111) crystal or an alloy of group TV semiconductor (111) crystal grown on the Sapphire.

This technology is an integrated hybrid crystal LED display device that can emit red, green, and blue colors on one single wafer. Todays LEDs are built with many compound semiconductors with type-I direct bandgap energies of two different crystal structures. While Red, Orange, Yellow, Yellowish Green LEDs are commonly made with III-V semiconductor alloys of Aluminum Gallium Indium Phosphide (AlGaInP) and Aluminum Gallium Indium Arsenide (AlGaInAs) with cubic zinc blende crystal structures, the higher energy colors such as green, blue, purple, and Ultra-Violet(UV) LEDs are made with III-Nitride compound semiconductor of AlGaInN alloys with hexagonal wurtzite crystal structures. Because the atomic crystal structures are different for red LED and green/blue LEDs, the integration of these semiconductor LEDs as individual R, G, B pixels on one wafer was almost impossible or very difficult so far.

To avoid catastrophic failure, traditional electrical ohmic contacts must be placed at some distance from the optimal position (especially for sensors) in high-temperature environments. In addition, conventional metallization techniques incur significant production costs because they require multiple process steps of successive depositions, photolithography, and etchings to deposit the desired ohmic contact material. Glenn's novel production method both produces ohmic contacts that can withstand higher temperatures than ever before (up to 600°C), and permits universal and simultaneous ohmic contacts on n- and p-type surfaces. This makes fabrication much less time-consuming and expensive while also increasing yield. This innovative approach uses a single alloy conductor to form simultaneous ohmic contacts to n- and p-type 4H-SiC semiconductor. The single alloy conductor also forms an effective diffusion barrier against gold and oxygen at temperatures as high as 800°C. Glenn's extraordinary method enables a faster and less costly means of producing SiC-based sensors and other devices that provide quicker response times and more accurate readings for numerous applications, from jet engines to down-hole drilling, and from automotive engines to space exploration.